Car Solutions QPI-G7-MAIN-V2.0 Bedienungsanleitung PDF herunterladen (Seite 59)

MT9V125_DS Rev. U 3/15 EN 59 ©Semiconductor Components Industries, LLC,2005.

MT9V125: SOC VGA Digital Image Sensor

Appendix A: Serial Bus Description

Two-Wire Serial Interface Sample

Write and read sequences (SADDR = 1).

16-Bit WRITE Sequence

A typical write sequence for writing 16 bits to a register is shown in Figure 36. A start bit

sent by the master starts the sequence, followed by the write address. The image sensor

sends an acknowledge bit and expects the register address to come first, followed by the

16-bit data. After each 8-bit transfer, the image sensor sends an acknowledge bit. All 16

bits must be written before the register is updated. After 16 bits are transferred, the

next register. The master stops writing by sending a start or stop bit.

Figure 36: WRITE Timing to R0x009—Value 0x0284

16-Bit READ Sequence

A typical read sequence is shown in Figure 37. The master writes the register address, as

in a write sequence. Then a start bit and the read address specify that a read is about to

occur from the register. The master then clocks out the register data, 8 bits at a time. The

master sends an acknowledge bit after each 8-bit transfer. The register address should be

incremented after every 16 bits is transferred. The data transfer is stopped when the

master sends a no-acknowledge bit.

Figure 37: READ Timing From R0x009; Returned Value 0x0284

8-Bit WRITE Sequence

To be able to write one byte at a time to the register, a special register address is added.

The 8-bit WRITE is started by writing the upper 8 bits to the desired register, then writing

the lower 8 bits to the special register address (R0x0F1). The register is not updated until

all 16 bits have been written. It is not possible to update just half of a register. In

Figure 38 on page 60, a typical sequence for an 8-bit WRITE is shown. The second byte is

written to the special register (R0x0F1).

SCLK

DATA

0xBA Address

Start

Sto

ACK

ACK ACK

ACK

Reg 0x009 0000 0010 1000 0100

SCLK

DATA

0xBA Address

Start Start Stop

ACK ACK ACK ACK NACK

Reg0x009 0xBB Address 0000 0010 1000 0100

1 2 ... 54 55 56 57 58 59 60 61 62 63 64 ... 68 69

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